module breath_led_display
#(
	parameter WIDTH = 4
)
(
	input							clk,
	input							rst_n,
	output [WIDTH - 1 : 0]	dout
);

localparam DELAY_TOP1 = 6'd50;
reg [5:0] delay_cnt1;
always @ (posedge clk or negedge rst_n) begin
	if (!rst_n) delay_cnt1 <= 0;
	else if (delay_cnt1 < DELAY_TOP1 - 1'b1) delay_cnt1 <= delay_cnt1 + 1'b1;
	else delay_cnt1 <= 0;
end
wire delay_1us = (delay_cnt1 == DELAY_TOP1 - 1'b1) ? 1'b1 : 1'b0;

localparam DELAY_TOP2 = 10'd1000;
reg [9:0] delay_cnt2;
always @ (posedge clk or negedge rst_n) begin
	if (!rst_n) delay_cnt2 <= 0;
	else if (delay_1us) begin
		if (delay_cnt2 < DELAY_TOP2 - 1'b1) delay_cnt2 <= delay_cnt2 + 1'b1;
		else delay_cnt2 <= 0;
	end else delay_cnt2 <= delay_cnt2;
end
wire delay_1ms = (delay_1us == 1'b1 && delay_cnt2 == DELAY_TOP2 - 1'b1) ? 1'b1 : 1'b0;

localparam DELAY_TOP3 = 10'd1000;
reg [9:0] delay_cnt3;
always @ (posedge clk or negedge rst_n) begin
	if (!rst_n) delay_cnt3 <= 0;
	else if (delay_1ms) begin
		if (delay_cnt3 < DELAY_TOP3 - 1'b1) delay_cnt3 <= delay_cnt3 + 1'b1;
		else delay_cnt3 <= 0;
	end else delay_cnt3 <= delay_cnt3;
end
wire delay_1s = (delay_1ms == 1'b1 && delay_cnt3 == DELAY_TOP3 - 1'b1) ? 1'b1 : 1'b0;

wire [9:0] pulse_cnt = delay_cnt2;
wire [9:0] display_cnt = delay_cnt3;

reg display_mode;
always @ (posedge clk or negedge rst_n) begin
	if (!rst_n) display_mode <= 0;
	else if (delay_1s) display_mode <= ~display_mode;
	else display_mode <= display_mode;
end

reg pwm_on;
always @ (posedge clk or negedge rst_n) begin
	if (!rst_n) pwm_on <= 0;
	else begin
		case (display_mode)
			1'b0: pwm_on <= (pulse_cnt < display_cnt) ? 1'b1 : 1'b0;
			1'b1: pwm_on <= (pulse_cnt < display_cnt) ? 1'b0 : 1'b1;
		endcase
	end
end

assign dout = {WIDTH{pwm_on}};

endmodule
